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dc.contributor.authorSubburaj, V.
dc.contributor.authorJena, D.
dc.date.accessioned2020-03-30T09:46:00Z-
dc.date.available2020-03-30T09:46:00Z-
dc.date.issued2017
dc.identifier.citationIEEE Region 10 Annual International Conference, Proceedings/TENCON, 2017, Vol., , pp.2892-2895en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/6696-
dc.description.abstractThis paper proposes, the topology of dual output interleaved Fibonacci switched capacitor converter by using a basic synthesis of Fibonacci converter. The proposed converter have more efficiency less voltage ripple. In the single output SCC, resolution of target voltage are spaced as 1/X, but in proposed method target voltage are spaced as 1+X, which gives a number of conversion ratios. The proposed converter are used for low power application such as VLSI system and energy harvesting devices. Theoretical results and simulation results are verified using PSIM. � 2016 IEEE.en_US
dc.titleSub-period interleaved Fibonacci switched capacitor converteren_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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