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DC Field | Value | Language |
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dc.contributor.author | Arumalla R.T. | |
dc.contributor.author | Figarado S. | |
dc.contributor.author | Panuganti K. | |
dc.contributor.author | Harischandrappa N. | |
dc.date.accessioned | 2021-05-05T10:28:07Z | - |
dc.date.available | 2021-05-05T10:28:07Z | - |
dc.date.issued | 2021 | |
dc.identifier.citation | IEEE Transactions on Circuits and Systems II: Express Briefs Vol. , , p. - | en_US |
dc.identifier.uri | https://doi.org/10.1109/TCSII.2021.3069552 | |
dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/15816 | - |
dc.description.abstract | A novel space vector-based approach is introduced in this paper to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination. IEEE | en_US |
dc.title | Selective Lower Order Harmonic Elimination in DC-AC Converter using Space Vector Approach | en_US |
dc.type | Article | en_US |
Appears in Collections: | 1. Journal Articles |
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