Investigation on Multi-cell and Hybrid Multilevel Inverters with Minimum Number of DC sources

Abstract

From the energy saving perspective, it is essential to adopt highly efficient DC to AC conversion (inverter) system for high power and medium voltage applications. Indeed the conventional two-level inverters cannot handle high power system unless series/parallel arrangements of semiconductor switching devices are used. However, these reformations have severe problems such as misfiring the gating pulses, voltage unbalances between the series connected devices and so on. Again to get rid of these problems, large snubber capacitors and resistors (passive elements) are connected to each switch for compensating transient voltages and static charge balance. Nevertheless, these passive elements cause a higher switching loss and relatively long switching time. On the other hand, total harmonic distortion of the output voltage waveform of traditional two-level inverters is one of the severe problems as the power ratings of the devices goes high. In this critical situation, the multi-level inverters (MLIs) are successfully introduced to overcome all the issues as mentioned earlier for medium and high power applications. Ever since the inception of MLIs, cascaded H-bridge (CHB), neutral point clamped (NPC) and flying capacitor converters are among the earliest topologies that are deemed to be well-established. Each of them has advantages and disadvantages. An NPC-MLI requires additional clamping diodes for its extension whereas, CHB-MLI and flying capacitor MLI needs many isolated DC sources to generate a multistep output and multiple capacitors respectively. Since then, many derivatives and refinements to these classic topologies have been proposed. The motivation for this research work stems out from the demand to generate a substantial number of voltage levels while keeping the device count as low as possible. Therefore, by taking advantage of the basic MLI configurations, a few schemes emanating as a result of combining two or more MLIs in part or fully, referred to as hybrid MLIs are proposed. The offered solutions exhibit considerable topological improvements with reduced control complexity. In the present thesis, we have mainly concentrated on designing a novel hybrid multilevel inverter which can provide an inbuilt isolation for gridiiiconnected, FACTS devices and standalone applications. This MLI can attain nineteen level output waveform with only 12 semiconductor switches. Moreover, it can be extended to n number levels where the switch count is further reduced enormously. In addition to that, a new PWM switching technique is introduced to refine the harmonic profile of the proposed MLI’output voltage waveform. The new PWM can efficiently operate at a very low switching frequency. Thereby, the switching losses of the proposed configuration are minimised drastically. Later, we have kept consistent efforts to derive a new power circuit from our first proposed configuration. Herein the device count is further reduced from 12 to 10 switches to produce the same nineteen level output waveform. In addition to that, an innovative controlling approach is implemented which is a simple fundamental switching strategy so-called ‘FSQS’technique. Moreover, the switching technique can achieve the least harmonic distorted output voltage waveform, and it can be applied to any topology and ‘n’number of output levels. On the other hand, motor drive applications always prefer the efficient MLIs without any transformer involvement in their structures. In fact, most of the power drives are still running with traditional MLIs where the part count is a significant limitation. Thereby we designed a new MLI topology which can attain the modularity with less circuit complexity. It has been named as a multi-cell MLI where the power cell is built asymmetrically. In fact, the part count of the proposed configuration is an appreciable rate compared to the traditional and recent MLIs for the equivalent level generations. In the end, the thesis is devoted to design three unique configurations and two new modulation techniques to address the full range of MLI applications. All developed configurations and schemes are simulated extensively in MATLAB/Simulink. After that, the topologies are verified experimentally by advanced DSP controller and OPAL-RT (Real Time) Simulator on a prototype setup for recording the corresponding output voltage, current, and the THD results